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SVATS: Safety Verification Analysis Added To Spice

SVATS is a collection of Python scripts used for adding repetitive analysis capabilities to Electronic Circuit Simulators like Berkeley Spice 3F5; its main purpose is to perform FMEA-like analysis on analog and mixed analog-digital electronic circuits, to test circuit behaviour under components failure conditions (that's what the logo also try to suggest ...).

SVATS can be useful for:

- Railway Safety Verification analysis of the so called "inherent fail-safe" hardware, which is basically made of analog circuits. In this case SVATS can be used to perform a FMEA (Failure Mode and Effect Analysis) on a given circuit, to help the designer (or the validation engineer) assessing the safety of a circuit or of a part of it, according to Railway Safety Standard ORE A155.3 and prEN50129.

- Automatic evaluation of components' stress levels, used for reliability analysis (MTBF calculation).

- Automatic evaluation of "overstressed" components, provided that you define a database of the maximum electrical ratings of your components (i.e. breakdown voltages for diodes, transistors, capacitors, ...). This function is not yet implemented as of release 0.1.

SVATS has been developed and tested under Linux; future releases should work also under Windows.


News

September 26th, 2001
SVATS 0.1 released


Please send comments, bugs report, suggestions, etc.. to:

Francesco Campedelli

campedel@email.com

Last update: September 26th, 2001

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